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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
* The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT253 Dual 4-input multiplexer; 3-state
Product specification File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
FEATURES * Non-inverting data path * 3-state outputs for bus interface * and multiplex expansion * Common select inputs * Separate output enable inputs * Output capability: bus driver * ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT253 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.
74HC/HCT253
The 74HC/HCT253 have two identical 4-input multiplexers with 3-state outputs which select two bits from four sources selected by common data select inputs (S0, S1). When the individual output enable (1OE, 2OE) inputs of the 4-input multiplexers are HIGH, the outputs are forced to the high impedance OFF-state. The "253" is the logic implementation of a 2-pole, 4-position switch, where the position of the switch is determined by the logic levels applied to S0 and S1. The logic equations for the outputs are: 1Y = 1OE(1l0.S1.S0+1I1.S1.S0+1I2.S1.S0+1I3.S1.S0) 2Y = 2OE(2l0.S1.S0+2I1.S1.S0+2I2.S1.S0+2I3.S1.S0) APPLICATIONS * Data selectors * Data multiplexers
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH PARAMETER propagation delay 1In, 2In to nY; Sn to nY CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". input capacitance power dissipation capacitance per multiplexer notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 17 18 3.5 55 17 19 3.5 55 ns ns pF pF HCT UNIT
December 1990
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Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
PIN DESCRIPTION PIN NO. 1, 15 14, 2 7, 9 8 6, 5, 4, 3 10, 11, 12, 13 16 SYMBOL 1OE, 2OE S 0, S1 1Y, 2Y GND 1I0 to 1I3 2I0 to 2I3 VCC NAME AND FUNCTION output enable inputs (active LOW) common data select inputs 3-state multiplexer outputs ground (0 V) data inputs from source 1 data inputs from source 2 positive supply voltage
74HC/HCT253
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
74HC/HCT253
Fig.4 Functional diagram.
Fig.5 Logic diagram.
FUNCTION TABLE SELECT INPUTS S0 X L L H H L L H H NOTES 1. H = HIGH voltage level L = LOW voltage level X = don't care Z = high impedance OFF-state S1 X L L L L H H H H nI0 X L H X X X X X X DATA INPUTS nI1 X X X L H X X X X nI2 X X X X X L H X X nI3 X X X X X X X L H OUTPUT ENABLE nOE H L L L L L L L L OUTPUT nY Z L H L H L H L H
December 1990
4
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: bus driver ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC SYMBOL PARAMETER +25 -40 to +85 -40 to +125 UNIT
74HC/HCT253
TEST CONDITIONS
VCC (V)
WAVEFORMS
min. typ. max. min. max. min. max. tPHL/ tPLH propagation delay 1In to nY; 2In to nY propagation delay Sn to nY 3-state output enable time nOE to nY 3-state output disable time nOE to nY output transition time 55 20 16 58 21 17 30 11 9 41 15 12 14 5 4 175 35 30 175 35 30 100 20 17 150 30 26 60 12 10 220 44 37 220 44 37 125 25 21 190 38 33 75 15 13 265 53 45 265 53 45 150 30 26 225 45 38 90 18 15 ns 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Fig.6
tPHL/ tPLH
ns
Fig.6
tPZH/ tPZL
ns
Fig.7
tPHZ/ tPLZ
ns
Fig.7
tTHL/ tTLH
ns
Fig.6
December 1990
5
Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
74HC/HCT253
DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: bus driver ICC category: MSI Note to HCT types The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT 1In 2In nOE S0 S1
UNIT LOAD COEFFICIENT 0.40 0.40 1.10 1.10 1.10
AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT SYMBOL PARAMETER min. tPHL/ tPLH propagation delay 1In to nY; 2In to nY propagation delay Sn to nY 3-state output enable time nOE to nY 3-state output disable time nOE to nY output transition time +25 typ. 20 -40 to +85 -40 to +125 UNIT V WAVEFORMS CC (V) ns 4.5 Fig.6 TEST CONDITIONS
max. min. max. min. max. 38 48 57
tPHL/ tPLH tPZH/ tPZL tPHZ/ tPLZ tTHL/ tTLH
22 14 13 5
40 30 30 12
50 38 38 15
60 45 45 18
ns ns ns ns
4.5 4.5 4.5 4.5
Fig.6 Fig.7 Fig.7 Fig.6
December 1990
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Philips Semiconductors
Product specification
Dual 4-input multiplexer; 3-state
AC WAVEFORMS
74HC/HCT253
(1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.6
Waveforms showing the input (1In, 2In) to output (1Y, 2Y) propagation delays and the output transition times.
(1) HC : VM = 50%; VI = GND to VCC. HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.7 Waveforms showing the 3-state enable and disable times.
PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines".
December 1990
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